🏛️ About Us!
Welcome to the CHART team's webpage!
CHART is the Chalmers Heterogeneous Architectures and Runtimes Team. Our research focuses on parallel and heterogeneous computer architectures, as well as the programming models used to program them. Our primary goals are to maximize performance and reduce energy consumption, while ensuring scalability, portability, and low performance variability. We target applications in High Performance Computing (HPC) and Artificial Intelligence (AI).
Key research directions include: (1) exploring runtime moldability to improve resource utilization and reduce interference, (2) leveraging inter-task locality to enhance cache efficiency and reduce memory traffic, and (3) extracting distant parallelism to better exploit wide SIMD units. In recent years, we have increasingly investigated how to automatically enable these optimizations using modern programming models such as OpenMP and SYCL, as well as machine learning libraries including oneDNN and NNPACK.
If you have any questions or are interested in joining our team, please do not hesitate to get in touch with us!
📣 Spotlight Updates!
[2026-03-17] 🎉 Congratulations to Hari Abram, Nikela Papadopoulou, Jens Domke, Miquel Pericàs of getting their paper "Cross-Architecture Autotuning for Single-Source Heterogeneous Programming Models" accepted in ICS 2026!
[2026-03-02] A warm welcome to Joel Andersson and Artem Mavliutov, who are officially joining our team as a PhD student and a postdoc today!
[2025-11-17] Miquel presented two of our group’s papers at the SC Conference!
- “Reproducible Performance Evaluation of OpenMP and SYCL Workloads under Noise Injection", Christoffer Persson, Mathias Prétot, Minyu Cui, Miquel Pericàs, 14th International Workshop on Runtime and Operating Systems for Supercomputers (ROSS 25) held as part of SC25.
- “ILAN: The Interference- and Locality-Aware NUMA Scheduler”, Edvin Mellberg, Axel Carlsson, Jing Chen and Miquel Pericas, the 16th International Workshop on Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (PMBS25) held as part of SC25.
🔬 Research Projects
👥 Team Members
Team Leader
Miquel Pericàs is a Professor (biträdande professor) at Chalmers University of Technology. His research interests cover parallel and heterogeneous programming models, and hardware/software codesign with a focus on SIMD architectures. At Chalmers Miquel is responsible for two courses on parallel programming and development and optimization of HPC software. He is currently serving as the Chalmers representative in the RISC-V International foundation. View the full list of publications on his Google Scholar page.
Postdoctoral Researchers
Jing’s research focuses on enhancing energy efficiency, performance modeling, power modeling, and task scheduling in high-performance computing systems - CPUs and GPUs. Her work involves developing adaptive energy-aware task scheduling techniques for OpenMP, CUDA, SYCL runtimes by leveraging hardware control knobs and task characteristics to optimize multi-objective energy-performance trade-offs. She is also interested in large language model (LLM) quantization techniques on GPUs. A full list of her publications is available on her Google Scholar page. See her personal page for details.
Artem's research focuses on high performance computing applications utilizing sparse linear algebra. In particular, his expertise lies in the domain of sparse iterative solvers as well as computational kernels such as SpMV and SpGEMM on CPUs and GPUs utilizing openMP, CUDA, and MPI parallel architectures. His current research interest lies in compiler-level optimizations for HPC workloads. For more information, see his LinkedIn page.
Ph.D. Students
Sonia's research focuses on the combined exploration of the optimization space for convolutional algorithms and the design space of tightly coupled architectures, with the goal of providing insights for designing future CPUs optimized for CNN inference. So far, she has investigated optimizations for the im2col+GEMM, Winograd, and Direct algorithms, along with tuning of micro-architectural parameters such as vector lengths, L2 cache, and on-chip parallelism on long vector architectures (RISC-VV, ARM-SVE). Now her interest is leading towards exploring dense transformers on multi-core architectures.
Hari's research focuses on performance characterization of the SYCL and OpenMP programming models, with an emphasis on SYCL through detailed micro-benchmarking. Additionally, he explores the feasibility of Process-In-Memory (PIM) processors within modern heterogeneous computing environments, aiming to unlock their potential for enhancing scientific applications.
Hongguang is currently working on optimizing OpenMP schedulers to improve parallel performance and resource utilization. He is particularly interested in exploring the SYCL + OpenMP programming path for heterogeneous systems. See his personal page for additional details about his work and background.
Joel is currently working on efficient usage of the vector register file in RISCV vector processors with large register sizes and multiple vector lanes. He intends to incorporate relevant findings into the SYCL and OpenMP runtimes.
Research Engineers
Bhavishya's research primarily focuses on memory subsystems, with an emphasis on scalable cache coherence mechanisms and NUMA (Non-Uniform Memory Access) architectures. He is also passionate about developing energy-efficient resource management techniques to optimize system performance and sustainability. View the full list of publications on his Google Scholar page.
🚀 NEW Job Vacancy!
For the job vacancy please contact the group leader Miquel Pericàs.
