CHART Research Team

About CHART

Advancing efficient computing for HPC and AI

CHART (Compilers, Heterogeneous Architectures and Runtimes Team) explores how computer architectures, programming models, and runtime systems can make parallel computing faster and more energy efficient.

Our research targets high-performance computing (HPC) and artificial intelligence (AI), with a focus on scalability, portability, and predictable performance. We investigate heterogeneous computing, task scheduling, resource management, data locality, and compiler–runtime optimization.

Research Projects

CHART contributes to European research initiatives advancing high-performance computing, processor architectures, and efficient computing systems.

DARE – A New Era for Supercomputing in Europe

Developing next-generation European supercomputing technologies and RISC-V-based computing systems.

Visit the DARE project website

Miquel Pericàs is a Professor (biträdande professor) at Chalmers University of Technology. His research interests cover parallel and heterogeneous programming models, and hardware/software codesign with a focus on SIMD architectures. At Chalmers Miquel is responsible for two courses on parallel programming and development and optimization of HPC software. He is currently serving as the Chalmers representative in the RISC-V International foundation. View the full list of publications on his Google Scholar page. 

Follow Miquel on LinkedIn, Mastodon, and Bluesky.

Jing’s research focuses on energy-efficient runtime systems and scheduling for heterogeneous CPU and GPU architectures. Her work explores task scheduling, resource management, and dynamic voltage and frequency scaling (DVFS) to optimize energy–performance trade-offs. Her current research focuses on multi-GPU task scheduling and energy-efficient large language model (LLM) inference serving. A full list of her publications is available on her Google Scholar page. See her personal page for details.

Artem's research focuses on high performance computing applications utilizing sparse linear algebra. In particular, his expertise lies in the domain of sparse iterative solvers as well as computational kernels such as SpMV and SpGEMM on CPUs and GPUs utilizing openMP, CUDA, and MPI parallel architectures. His current research interest lies in compiler-level optimizations for HPC workloads. For more information, see his LinkedIn page. 

Sonia's research focuses on the combined exploration of the optimization space for convolutional algorithms and the design space of tightly coupled architectures, with the goal of providing insights for designing future CPUs optimized for CNN inference. So far, she has investigated optimizations for the im2col+GEMM, Winograd, and Direct algorithms, along with tuning of micro-architectural parameters such as vector lengths, L2 cache, and on-chip parallelism on long vector architectures (RISC-VV, ARM-SVE). Now her interest is leading towards exploring dense transformers on multi-core architectures.

Hari's research focuses on performance characterization of the SYCL and OpenMP programming models, with an emphasis on SYCL through detailed micro-benchmarking. Additionally, he explores the feasibility of Process-In-Memory (PIM) processors within modern heterogeneous computing environments, aiming to unlock their potential for enhancing scientific applications.

Hongguang is currently working on optimizing OpenMP schedulers to improve parallel performance and resource utilization. He is particularly interested in exploring the SYCL + OpenMP programming path for heterogeneous systems. See his personal page for additional details about his work and background. 

Joel is currently working on efficient usage of the vector register file in RISCV vector processors with large register sizes and multiple vector lanes. He intends to incorporate relevant findings into the SYCL and OpenMP runtimes. 

• Alireza Parvizi

• Wincent Stålbert Holm

Bhavishya's research primarily focuses on memory subsystems, with an emphasis on scalable cache coherence mechanisms and NUMA (Non-Uniform Memory Access) architectures. He is also passionate about developing energy-efficient resource management techniques to optimize system performance and sustainability. View the full list of publications on his Google Scholar page. 

Opportunities

We welcome inquiries from prospective PhD students, postdoctoral researchers, and students interested in research projects related to computer architectures, runtime systems, and energy-efficient computing.

For inquiries about potential opportunities, please contact Prof. Miquel Pericàs.