Title: FPGA-based noise shaping ADC for feedback in switched control systems
Översikt
- Datum:Startar 12 juni 2023, 15:00Slutar 12 juni 2023, 16:00
- Plats:
- Språk:Svenska och engelska
Supervisors:
Magnus Bik, Lab Gruppen
Examiner:
Rob Maaskant rob.maaskant@chalmers.se
Opponents: Oskar Nilzén, Carl-Johan Vickström
Abstract:
This thesis explores the possibility of implementing a customized Delta-Sigma ADC for feedback in a digital, switched audio amplifier. It was conducted in collaboration with Lab Gruppen, Kungsbacka, who wished to investigate if a cheaper and more flexible ADC than the current one’s available on the market could be designed, using an FPGA and simple analog circuitry. The design process involved system-level design in Matlab/Simulink, analog circuit design in LTspice and digital hardware implementation in Modelsim and Vivado. Simulation results and calculations showed that a second order Delta-Sigma modulator followed by a third order CIC-decimation filter could, in theory, fulfill the product specifications. An attempt was made to implement the analog hardware using discrete components, and was achieved for a first order modulator in simulation. The digital CIC-filter was successfully designed, synthesized and implemented on the target device. Although the proposed design was not successfully implemented in hardware, the results show promise in finding an implementation that is cheaper than off-the-shelf ADCs. Future work could include designing the second order modulator using more conventional switched-capacitor integrators, improving the digital filter and building a functioning prototype.
Welcome!
Hampus, Nicklas and Rob