Title: Implementation of a wafer-level test setup for the purpose of reliability assessment of GaN devices
Overview
- Date:Starts 7 September 2023, 13:00Ends 7 September 2023, 14:00
- Location:Seminar room B618, MC2
- Language:English
Abstract:
An increased demand for Gallium Nitride (GaN) in power electronics applications
creates an essential need to assess the devices’ performance. In this thesis, a wafer level test setup is created, assessed, and implemented for the purpose of performing
reliability measurements on GaN devices. Included in the setup are a probe card
and a gate driver power supply. Three probe card designs are compared, and a final
design is made of the findings from the comparison. The three probe cards show
varying behavior due to the different values of the parasitic elements that are present
in the probe card. The parasitic inductance and parasitic capacitance are reduced in
the final version. At last, a soft-switching stress test is performed. The waveforms
from the test with the final probe card design and gate driver power supply show
fast turn-off transient. The turn-off RC time constant τ was improved by 89 % in
the final design.