Christian Krizan, Quantum Technology Laboratory

Main supervisor: Jonas Bylander, Professor, Quantum Technology Laboratory

Examiner: Per Delsing, Professor, Quantum Technology Laboratory

Discussion leader: Simone Gasparinetti, Docent, Quantum Technology Laboratory

Abstract: 

It is advantageous for a quantum processor to support a broad selection of logic operations ("gates") when compiling quantum algorithms. A property typically not seen with existing hardware, as all quantum gates are not possible on all quantum processors.

Superconducting quantum processors, based on transmon qubits linked via parametrically modulated tuneable couplers, enable the use of microwave pulses to selectively engage desired quantum state transitions, and thus process logic. The workhorse logic operation on such hardware is the CZ gate, where a phase in a "target" qubit's state is inverted if a "control" qubit is in state |1⟩. While this gate enables complete computation, it is inefficient in practice to only support the CZ gate, as it easily leads to quantum algorithms tripling in size once compiled for the quantum processor.

An alternative to the CZ gate is the iSWAP gate, which exchanges the state of two qubits while also appending quantum state phase when these qubits exclusively differ. However, similarly to the CZ gate, supporting just the iSWAP gate also easily leads to quantum algorithms tripling in size once compiled.

We expand the set of supported gates on our quantum processor by implementing the iSWAP gate alongside the previously supported CZ gate. We thus extend our platform so that any two-qubit Clifford unitary matrix can be realised using at most 2 two-qubit gates, supplemented by single-qubit gates, instead of the previously required 3. Using the iSWAP and CZ gates, we decompile and experimentally realise a SWAP gate, which exchanges the states of two qubits without introducing phases. We demonstrate the expanded gate set experimentally using conditional-Ramsey and cross-Ramsey interferometry.