Toward a runtime-centric computer architecture

​Docent lecture by Miquel Pericas, Computer Science and Engineering.

From 1980 until 2000 the performance of microprocessors increased by more than three orders of magnitude owing to improvements in circuits and computer designs. At the same time, the instruction set architecture (ISA) provided a consistent interface between software and hardware, and enabled backward compatibility across processor generations. Since 2004, transistors are still getting smaller but no longer faster. As a result, the computer industry has reacted by focusing on multicores, exploiting parallelism and heterogeneity for greater performance. However, ISAs remain core-centric. As parallelism and heterogeneity increase, the efficient management of chip-level resources increasingly requires a global system view.

In this lecture I will describe our attempts to improve performance and efficiency by moving from a core-centric to a runtime-centric computer architecture. I will begin by describing a novel runtime resource manager developed at Chalmers called XiTAO. XiTAO exploits task moldability to reduce software interference and achieve both resource-aware and locality-aware execution. Next, I will describe several ways in which the hardware can leverage runtime information to reconfigure itself and achieve better energy efficiency.
​Miquel Pericas belongs to the Computer Engineering division of Computer Science and Engineering.
Category Public lecture
Location: EA, lecture hall, EDIT trappa C, D och H, EDIT
Starts: 15 February, 2018, 11:00
Ends: 15 February, 2018, 12:00

Published: Fri 02 Feb 2018.