Seminar - Iain Thayne
An Overview of III-V MOSFET Research at The University of Glasgow, Professor Iain Thayne
The Nanoelectronics Research Centre at the University of Glasgow have been engaged in research of III-V MOSFETs since 2002. Since then, a team spanning activity in MBE growth of III-V materials and gate oxides; III-V oxide metrology by temperature dependent photoluminescence, capacitance, conductance and current voltage, and TEM-based structural, compositional and chemical techniques; physics-based device simulation; silicon compatible process module development and integration have been seeking solutions to contribute to continued scaling of the International Technology Roadmap for Semiconductors beyond the 15 nm technology generation.
This presentation will review and summarise a decade of activity on III-V MOSFETs in Glasgow and make some observations on the future challenges and potential solutions for this technology in the coming years.
Bio – Professor Iain Thayne can be reached at the Nanoelectronics Research Centre in the University of Glasgow at email@example.com or on +44(0)141 330 3859, where coordinates III-V MOSFET research. He has been a member of Faculty in the School of Engineering in Glasgow since 1995. Prior to this, he was a research scientist at Philips Research Labs in Surrey, England, working on short gate length III-V HEMTs, which were also the subject of his PhD thesis studies.
Professor Iain Thayne is giving the seminar in conjunction in being faculty opponent at the PhD dissertation of Giuseppe Moschetti, Microwave Electronics Laboratory (MEL), MC2 on 4 December, 10 am, Kollektorn.
Contact for the visit: Prof. Jan Grahn, MEL
Coffee room, floor D6