|
|
|
|
|
Chalmers University of TechnologyThe High-Performance Computer Architecture Group at Chalmers is primarily concerned with how to design future computer systems aimed at the embedded as well as at the high-end computing market. A key focus is on design principles and methods for multi-threaded processor architectures, memory systems, and performance evaluation methodologies. The focus of the research over the last 10-15 years has been on design principles for exploiting coarse-grained or thread-level parallelism in multiprocessors - a topic of high relevance than ever today as all microprocessors exploit thread-level parallelism. We have contributed with more than a hundred international publications and patents on cache coherence schemes, latency-tolerance techniques in multiprocessors using pre-fetching and relaxed memory consistency models and techniques to implement thread-level speculation such as transactional memory. The focus is also on design issues for embedded systems, e.g., architectural tradeoffs to meet hard real-time and energy-effective demands.
Current work focuses on the following topics:
|
 |
|
|
 |