Events: Informations- och kommunikationsteknikhttp://www.chalmers.se/sv/om-chalmers/kalendariumUpcoming events at Chalmers University of TechnologySun, 23 Apr 2017 17:33:06 +0200http://www.chalmers.se/sv/om-chalmers/kalendariumhttp://www.chalmers.se/en/departments/cse/calendar/Pages/dmitryknyaginindisp.aspxhttp://www.chalmers.se/en/departments/cse/calendar/Pages/dmitryknyaginindisp.aspxDmitry Knyaginin, Computer Science and Engineering<p>EC</p><p>Towards Large-Capacity and Cost-Effective Main Memories</p><strong>Abstract:</strong> Large, multi-terabyte main memories per processor socket are instrumental to address the continuously growing performance demands of domains like high-performance computing, databases, and big data. It is an important objective to design large-capacity main memories in a way that maximizes their cost-effectiveness and at the same time minimizes performance losses caused by cost-effective tradeoffs. This thesis addresses a number of issues towards this objective. First, parallel memory protocols, that are key to large main memories, have a limited number of pins. This implies that to address future capacities, the protocols would have to multiplex the pins to transfer wider addresses in a greater number of cycles, hurting performance. This thesis contributes with the concept of adaptive row addressing, comprising three techniques, as a general approach to minimize the performance losses of such cost-effective parallel memory protocols, and, in fact, make them as efficient as an idealized protocol with many enough pins to transfer each address in one cycle. Second, emerging Storage-Class Memory (SCM) technologies can potentially revolutionize main memory design by enabling large-capacity and cost-effective hybrid main memories, that combine DRAM and SCM. However, they add multiple dimensions to the design space of main memories. Detailed exploration of such design spaces solely by means of simulation or prototyping is inefficient. This thesis contributes with Crystal, an analytic method for partitioning hybrid-memory area between DRAM and SCM at design time, and Rock, a framework for pruning design spaces of hybrid memories. Crystal and Rock help system architects to quickly and correctly identify the most promising design points for subsequent detailed evaluation. Third, in hybrid main memories, DRAM is the limited resource, and co-running programs compete for it. Fair and at the same time high-performance management of such memories is an important and open issue. To avoid long operating-system overheads, this management has to be performed by hardware. This thesis contributes with ProFess: a probabilistic hybrid main memory management framework for high performance and fairness. ProFess includes two hardware-based mechanisms that cooperate to significantly improve fairness, performance, and energy-efficiency compared to the state-of-the-art.http://www.chalmers.se/en/departments/cse/calendar/Pages/salomemarolic.aspxhttp://www.chalmers.se/en/departments/cse/calendar/Pages/salomemarolic.aspxSalome Maro, Computer Science and Engineering<p>Jupiter 520</p><p>Addressing Traceability Challenges in the Development of Embedded Systems</p><h4 class="chalmersElement-H4">Abstract </h4> <div><strong>Context:</strong> Currently, development efforts in embedded systems development lead to a large number of interconnected artifacts. Traceability enables understanding and managing these artifacts as they evolve. However, establishing traceability is not a trivial task, it requires the development organization to plan how traceability will fit into its processes and provide tools to support traceability establishment. In practice, guidelines for how traceability should be established are lacking. Therefore, companies struggle with establishing traceability and making the most of traceability once it is established. <br /><br /><strong>Objective:</strong> The overall objective of this research is to improve traceability processes and tools for embedded systems development. In this thesis, we started with first understanding the domain and practical traceability challenges and also investigated how traceability tools can be improved. <br /><br /><strong>Method:</strong> Since establishing traceability is a practical problem, our research is conducted in close collaboration with industry partners. We conducted qualitative empirical studies to understand which traceability challenges exist in reality and designed solutions for some of these challenges. Concretely, we used action research, case study and design science methods for the different studies. <br /><br /><strong>Results:</strong> Our studies show that establishing traceability in practice still has several challenges, the most prominent ones being: the manual work of establishing traceability is high; the engineers responsible for creating the links perceive it as an overhead; lack of tools to enable using traceability; lack of methods and tools to measure its quality; no universal standards for traceability to be shared and exchanged and it is difficult to measure the return on investment of establishing traceability. To reduce the amount of manual work needed to maintain traceability links, we designed guidelines that can be followed by tool developers. We also show the feasibility of a configurable and extendable traceability management tool through a prototype implementation. <br /><br /><strong>Contributions:</strong> As part of this thesis, we have elicited persistent traceability challenges in development of embedded systems development. This list of challenges can also be used by other researchers who are interested in the topic of traceability for embedded systems development. As a first initiative towards solving these challenges, we propose important factors and guidelines for traceability tool developers and organizations that need to acquire traceability tools. Lastly, we have demonstrated the feasibility of these factors and guidelines through a prototype implementation. This implementation is open source and available for industry to use in their development and for other researchers to use for studies and extend the tool.</div>http://www.chalmers.se/en/areas-of-advance/ict/calendar/Pages/IS4SI-2017.aspxhttp://www.chalmers.se/en/areas-of-advance/ict/calendar/Pages/IS4SI-2017.aspxDIGITALISATION FOR A SUSTAINABLE SOCIETY<p>Chalmers conference center, Johanneberg</p><p>​Embodied, Embedded, Networked, Empowered through Information, Computation &amp; Cognition! Gothenburg, Sweden, 12-16 June 2017</p>​<img src="/SiteCollectionImages/Areas%20of%20Advance/Information%20and%20Communication%20Technology/News%20events/Calendar/is4si-logo.jpg" class="chalmersPosition-FloatRight" alt="" style="margin:5px" /><br />Welcome to the IS4SI 2017 Summit, presented by the International Society for Information Studies.<br /><br />Go to conference web: <a href="http://is4si-2017.org/" target="_blank">http://is4si-2017.org</a>http://www.chalmers.se/en/departments/cse/calendar/Pages/IFIP2017.aspxhttp://www.chalmers.se/en/departments/cse/calendar/Pages/IFIP2017.aspxWelcome to IFIPTM 2017 in Gothenburg!<p>Jupiter building, Lindholmen.</p><p></p>IFIPTM, the IFIP WG 11.11 International Conference on Trust Management is coming to Gothenburg! <br />The trust management community will convene for five days and engage in inspiring talks, technical demonstrations, a graduate symposium, and many other activities. The mission of the IFIP TM Conference is to share research solutions to problems of Trust and Trust management, including related Security and Privacy issues, and to identify new issues and directions for future research and development work.http://www.chalmers.se/en/areas-of-advance/ict/calendar/Pages/ACM-VRST-2017.aspxhttp://www.chalmers.se/en/areas-of-advance/ict/calendar/Pages/ACM-VRST-2017.aspxThe ACM Symposium on Virtual Reality Software and Technology (VRST) 2017<p>Chalmers Lindholmen, Gothenburg</p><p>​VRST will provide an opportunity for VR researchers to interact, share new results, show live demonstrations of their work, and discuss emerging directions for the field.</p>​ <br />The ACM Symposium on Virtual Reality Software and Technology (VRST) is an international forum for the exchange of experience and knowledge among researchers and developers concerned with virtual reality software and technology. <br /><br /><a href="https://vrst.acm.org/vrst2017/index.html">To conference website: http://vrst.acm.org/vrst2017/</a><br /><br />