Negi, Anurag; Titos Gil, Ruben: SCIN-Cache: Fast Speculative Versioning in Multithreaded Cores. ACM Transactions on Architecture and Code Optimization, 9 (4)

Titos Gil, Ruben; Acacio, M. E.; Garcia, J. M.: Efficient Eager Management of Conflicts for Scalable Hardware Transactional Memory. IEEE Transactions on Parallel and Distributed Systems, 24 (1) pp. 59-71.

Negi, Anurag; Titos Gil, Ruben; Acacio, Manuel; Garcia, Jose; Stenström, Per: Pi-TM: Pessimistic Invalidation for Scalable Lazy Hardware Transactional Memory. 18th IEEE International Symposium on High Performance Computer Architecture (;New Orleans, LA; February 25-29 2012, pp. 141-151. ISBN/ISSN: 978-146730824-3

Negi, Anurag; Stenström, Per; Titos Gil, Ruben; Acacio, Manuel E.; Garcia, Jose: Pi-TM: Pessimistic Invalidation for Scalable Lazy Hardware Transactional Memory. The 20th International Conference on Parallel Architectures and Compilation Techniques, PACT 2011 Galveston, TX; 10 October 2011 through14 October 20111, (Article number 6113816) pp. 203-204. ISBN/ISSN: 978-076954566-0

Negi, Anurag; Titos Gil, Ruben; Acacio, Manuel E.; García, José M.; Stenström, Per: The impact of non-coherent buffers on lazy hardware transactional memory systems. IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum, 25th IEEE International Parallel and Distributed Processing Symposium, Workshops and Phd Forum, IPDPSW 2011; Anchorage, AK; 16 May 2011 through 20 May 2011, pp. 700-707 . ISBN/ISSN: 978-076954385-7