Negi, Anurag; Titos Gil, Ruben: SCIN-Cache: Fast Speculative Versioning in Multithreaded Cores. ACM Transactions on Architecture and Code Optimization, 9 (4)

Negi, Anurag: Speculative State and Contention Management in Hardware Transactional Memory. Göteborg : Chalmers University of Technology. Diss. ISBN/ISSN: 978-91-7385-816-8

Arjemach, Adria; Negi, Anurag; Cristal, Adrian; Unsal, Osman; Stenström, Per: Transactional Prefetching: Narrowing the Window of Contention in Hardware Transactional Memory. TRANSACT ,

Manivannan, Madhavan; Negi, Anurag; Stenström, Per: A Data Forwarding Scheme for Task-based Programming Models. Proceedings of the Fifth Swedish Workshop on Multicore Computing,

Negi, Anurag; Titos Gil, Ruben; Acacio, Manuel; Garcia, Jose; Stenström, Per: Pi-TM: Pessimistic Invalidation for Scalable Lazy Hardware Transactional Memory. 18th IEEE International Symposium on High Performance Computer Architecture (;New Orleans, LA; February 25-29 2012, pp. 141-151. ISBN/ISSN: 978-146730824-3

Negi, Anurag; Armejach, Adria; Cristal, Adrian; Unsal, Osman; Stenström, Per: Transactional Prefetching: Narrowing the Window of Contention in Hardware Transaction Memory. International Conference on Parallel Architectures and Compiler Techniques (PACT),

Negi, Anurag; Armejach, A.; Cristal, A.; Unsal, O.S.; Stenström, Per: Transactional prefetching: Narrowing the window of contention in hardware transactional memory. 21st International Conference on Parallel Architectures and Compilation Techniques, PACT 2012. Minneapolis, MN, 19 - 23 September 2012, pp. 181-190.

Negi, Anurag: Adaptable Hardware Transactional Memory Protocols. Göteborg : Chalmers University of Technology.

Negi, Anurag; Titos-Gil, R.; Acacio, M. E.; García, J. M.; Stenström, Per: Eager meets lazy: The impact of write-buffering on hardware transactional memory. Proceedings of the International Conference on Parallel Processing. 40th International Conference on Parallel Processing, ICPP 2011, Taipei City, 13-16 September 2011, pp. 73-82. ISBN/ISSN: 978-076954510-3

Negi, Anurag; Stenström, Per; Titos Gil, Ruben; Acacio, Manuel E.; Garcia, Jose: Pi-TM: Pessimistic Invalidation for Scalable Lazy Hardware Transactional Memory. The 20th International Conference on Parallel Architectures and Compilation Techniques, PACT 2011 Galveston, TX; 10 October 2011 through14 October 20111, (Article number 6113816) pp. 203-204. ISBN/ISSN: 978-076954566-0

Negi, Anurag; Titos, Ruben; Acacio, Manuel; Garcia, Jose; Stenström, Per: The Impact of Non-coherent on Lazy HardwareTransactional Memory Systems. APDCM 2011 (in conj. with 2011 IEEE IPDPS),

Titos-Gil, R.; Negi, Anurag; Acacio, M. E.; García, J. M.; Stenström, Per: ZEBRA: A data-centric, hybrid-policy hardware transactional memory design. Proceedings of the International Conference on Supercomputing, ICS 2011. Tucson, 31 May-4 June 2011, pp. 53-62 . ISBN/ISSN: 978-145030102-2

Negi, Anurag; Waliullah, Mrida Mohammad; Stenström, Per: LV*: A Class of Lazy-Versioning HTMs for Low-Cost Integration of Transactional Memory Systems. 2nd IEEE Int. Forum of Next-Generation Multicore/Many-Core Technologies (IFMT’2010), ISBN/ISSN: 978-145030008-7

Negi, Anurag; Waliullah, Mrida Mohammad; Stenström, Per: LV*: A Low Complexity Lazy Versioning HTM Infrastructure. Proceedings - 2010 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2010, pp. 231-240. ISBN/ISSN: 978-142447938-2