As semiconductor technology scales, chips are becoming ever less reliable; prominent reasons for this phenomenon are the sheer number of transistors on a given silicon area and their shrinking device features. As a consequence, fault tolerance, provided through various redundancy schemes, comes at an enormous increase in power and performance cost. Also, power consumption and heat dissipation are becoming significantly limiting factors for performance and SoC design in general. In the face of such changes in the technological landscape, current solutions for fault-tolerance are expected to introduce an excessive overhead in future SoCs.

Developing new techniques

At the increasing fault-rates, expected in the upcoming technology generations, DeSyRe will develop new design techniques for future reliable SoCs. The primary project objectives are to reduce, compared to existing approaches, the power and performance overheads of fault-tolerance by 10-20%, as well as to improve yield decreasing the number of defective chips by 10-40%. The developed techniques will be used to design new advanced embedded systems targeting future high-tech medical devices for new treatments. Developing new design techniques for more efficient customizable and adaptive systems has a clear market motivation on improving fault-tolerance, power-efficiency, and performance of future SoCs.

Demonstration and Use

DeSyRe will deliver a well-defined, generic, and repeatable design framework for a large variety of SoCs. The proposed framework will be applied to two medical SoCs with high reliability constraints and diverse performance and power requirements. The first one is a portable artificial cerebellum used for rescuing part of a biological brain, while the second one is an implantable artificial pancreas which measures the glucose concentration in the blood of a diabetic person and accordingly releases the proper amount of insulin.

Impact

The presence of strong academic partners and competitive, rapidly growing industrial players in the consortium is expected to bring significant scientific and technological advances in the design of future SoCs. The universities and research organizations will stay on the forefront of research in using the results. This will ultimately lead to new young European experts, trained in the new technologies developed in the project, as well as to new high technology jobs for European workers.

DeSyRe targets Fault-Tolerant SoCs primarily in the embedded domain. The impressive and ever-increasing penetration of embedded devices as well as the ubiquity demands made on such systems by modern society trends make this domain our primary focus.

Considerable reductions of the energy and performance overheads for fault tolerance will contribute to more efficient embedded SoCs used in various activities of our everyday life. Within the project, new advanced medical systems will be prototyped achieving the first, crucial step towards the commercialization of future high-tech medical devices. Such medical devices will bring about new treatments and means to significant pathoses for the end-users.

Project coordinator

Chalmers University of Technology

Contact person

Ioannis Sourdis, CSE department
Tel: +46 317721744
sourdis at chalmers dot se
Chalmers University of Technology
Rännvägen 6, 41296 Göteborg, Sweden